For the circuit of Figure 1:
1. (a) Draw the D.C. equivalent circuit.
(b) Determine the value of:
(i) The overdrive voltage of Q1
(ii) IE2, the D.C. emitter current of Q2
(c) Find the D.C. voltages at each circuit node.
2. (a) Draw the a.c. equivalent circuit (i.e. retaining transistor symbols) for the overall circuit
(b) Draw the simplified a.c. equivalent circuit for the overall circuit at midband frequencies
(c) What is this circuit configuration called? What are its characteristics and advantages?
3. (a) Choose appropriate small signal models for each transistor, explaining your choice.
(b) Draw these models and calculate the values of their components.
(c) Determine the value of Cï0 (the zero-bias value of Cï) given that the built-in potential of
the base-collector junction Vjc = V0c = 0.8 volts and the base-collector junction is linearlygraded
i.e. has a grading coefficient of 1/3 (Sedra would refer to this as m =1/3 )4. (a) Draw the overall small-signal equivalent circuit
(b) Draw the simplified small-signal equivalent for midband frequencies
(c) Calculate the value of the mid-band gain, vo/vi and also express it in decibels
5. (a) Using the Short Circuit Time Constant Method, determine the lower break frequency
(b) Show that ï€¨ ï€©
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